The present invention relates to a multiprocessing system with a single time-of-day (TOD) clock and more particularly to a multiprocessing system in which timing facilities in two or more central processing units (CPUs) are implemented as a function of a single TOD clock.
In a multiprocessing system where two CPUs share a single hardware TOD clock, each CPU has the capability to read and set the shared TOD clock. In such a system the CPU timer, which is logically independent of the TOD clock, can be implemented in each CPU as a function of the TOD clock. To do this, each CPU maintains a parameter in local store which is calculated by adding a preselected amount to the reading on the TOD clock. The timer value can then be computed by subtracting a later reading of the clock from the local store parameter.
When one CPU executes the instruction Set Clock (SCK) which modifies the TOD Clock, the stored CPU timer parameter in both CPUs must be adjusted. Therefore, the issuing CPU not only sets the TOD clock but also subtracts the reading of the TOD clock before and after the modification to generate a TOD delta to be used in updating the stored CPU timer parameter in all CPUs sharing the same TOD Clock. The issuing CPU stores these TOD deltas in the shared processor section of main storage and then signals all CPUs of the TOD clock change via a CPU-to-CPU signaling mechanism. At the end of the current unit of operation (EOP), each CPU will execute a microprogram typically called the TOD Clock Change Handler routine which uses the TOD delta to update its CPU timer parameter to reflect the change in the TOD clock.
This scheme works except for the case when a CPU sharing the TOD clock with the CPU executing the SCK instruction is concurrently executing an instruction which uses a CPU timer value, such as Set CPU Timer (SPT) or Store CPU Timer (STPT). If, for example, a SCK instruction was being executed on one CPU concurrent with a STPT instruction on the other CPU, the second CPU might erroneously compute the CPU timer value by subtracting the new TOD value from a local store parameter based on the old TOD value. One way of solving the problem would be to employ a synchronization signalling scheme which would prevent the second CPU from reading the clock at an inappropriate time. This would be complicated and costly.